Skip to main content
English
中文
Log In
Log in
Log in with ORCID
NTU Single Sign On
Have you forgotten your password?
Home
College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
Statistical Timing Analysis in Sequential Circuit for On-Chip Global Interconnect Pipelining
Details
Statistical Timing Analysis in Sequential Circuit for On-Chip Global Interconnect Pipelining
Journal
IEEE/ACM Design Automation Conference (DAC)
Date Issued
2004-06
Author(s)
Lizheng Zhang
Yu Hen Hu
CHUNG-PING CHEN
DOI
10.1145/996566.996806
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/310828
SDGs
[SDGs]SDG9
Type
conference paper
