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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Locating logic design errors via test generation and don't-care propagation
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Locating logic design errors via test generation and don't-care propagation
Resource
Design Automation Conference, 1992. EURO-VHDL '92, EURO-DAC '92. European
Journal
Design Automation Conference, 1992. EURO-VHDL '92, EURO-DAC '92. European
Pages
-
Date Issued
1992-09
Date
1992-09
Author(s)
Kuo, Sy-Yen
DOI
10.1109/EURDAC.1992.246202
DOI
N/A
URI
http://ntur.lib.ntu.edu.tw//handle/246246/2007041910032329
Type
conference paper
File(s)
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Name
00246202.pdf
Size
369.69 KB
Format
Adobe PDF
Checksum
(MD5):6a493b420391955e1db8addf0cbb9bfe
