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College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
A Low-Power VLSI Neural Processor Design for Image Data Compression in a SOI CMOS Technology
Details
A Low-Power VLSI Neural Processor Design for Image Data Compression in a SOI CMOS Technology
Journal
Intl. Conf. on Integrated Micro/Nanotechnology for Space Applications
Date Issued
1999-03
Author(s)
W. Fang
E. Lin
TSUNG-HSIEN LIN
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/352506
Type
conference paper