Low-Power Multi-Band and Multi-Standard CMOS RF Receiver Front-End Circuit Design
Date Issued
2009
Date
2009
Author(s)
Yen, Ta-Tong
Abstract
As the demand of wireless system increases rapidly, more and more wireless communication standards are used simultaneously in our lives. Therefore, a multi-band and multi-standard communication system that can be integrated into a single wireless transceiver becomes an important research issue. The dominant technique to achieve highly-integrated receiver architecture is the multi-band front-end circuit design. This Thesis is focused on a multi-band and multi-standard RF receiver front-end for GSM900, DCS1800, 802.11 a/b/g, and Bluetooth applications. The proposed multi-band RF receiver front-end adopts a direct conversion architecture, thus reducing chip area and power consumption by hardware sharing. Moreover, it uses a fully differential structure to suppress the supply noise. The measurement results show that the RF receiver front-end occupies an area of 0.62 mm2, dissipating 9.36mW at Post-simulation and 12.29mW at measurement with a 1.2V power supply in TSMC CMOS 0.13μm process.The multi-band LNA configured in 0.9, 1.8, 2.4, and 5.2 GHz bands is composed of a two-stage amplifier. The first-stage amplifier is based on our proposed dual-loop feedback technique to reach low noise and power consumption, and has a wideband matching from 0.9GHz to 5.2GHz. The second-stage amplifier has a band selection function with switching capacitors and resistors. In designing the low supply-voltage mixer, an adaptive current-injection method is brought up to improve the problem of process variation caused by the low supply-voltage required, and this topology is more practical and accurate in advanced process technology.
Subjects
RF front-end circuit
LNA
Mixer
Type
thesis
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