Low Power Analog to Digital Converter for Bio-Medical Applications
Date Issued
2012
Date
2012
Author(s)
Yu, Yi-Long
Abstract
This thesis researches an energy-efficient analog to digital converter (ADC) for bio-medical applications, and proposes a master-slave digital to analog converter (M-S DAC) technique implemented in a successive approximation register analog (SAR) ADC chip fabricated in 180nm CMOS. The function of energy-reduction is demonstrated by the measurements of the chip.
The M-S DAC technique using an additional master DAC (MDAC) with extra area of 5% in capacitor array can prevent energy from waste in vain, which is caused by the repeatedly charge and discharge in the same capacitor of conventional capacitor array, particularly in larger bits. The sequences of M-S DAC are sampling, MDAC cycling, bit transferring, slave DAC (SDAC) cycling. The optimum number of bits and energy dis-sipation in the capacitor array is analyzed and identified by the simulation and meas-urements.
The prototype SAR ADC using the M-S DAC has the resolution of 10-bit, sam-pling rate at 500KS per second with supply voltage of 1V which is adopted by bio-applications in common. The reduction ratio of energy dissipation in capacitor array is 93% in this work within the mismatch constraint and the core area is 0.15 mm2 with the area-reduction of 75% in capacitor array compared with conventional array. This prototype achieves the signal-to-noise-and-distortion-ratio of 59.2dB in equivalent to effective number of bits of 9.6-bit in measurement. The power consumption significantly reduces by M-S DAC technique. The total power is 28μW and it reaches the FoM 77fJ/Conversion-step. Conclusively, this thesis provides a technique for capacitor array to reduce energy dissipation, and demonstrated the function of the technique by a fabri-cated chip.
Subjects
bio-application
low power
low voltage
SAR ADC
energy-efficient
M-S DAC
mismatched capacitor array
Type
thesis
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