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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Gate Misalignment Effects of DG SOI NMOS Devices
Details
Gate Misalignment Effects of DG SOI NMOS Devices
Journal
VLSI/CAD Conference
Date Issued
2004-08
Author(s)
JAMES-B KUO
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/310516
Type
conference paper