Low Power High-Level Synthesis Method using Multiple Voltages
Date Issued
2006
Date
2006
Author(s)
Tsai, Kun-Lin
DOI
en-US
Abstract
The portable consumer electronics market is constantly demanding more powerful capabilities, smaller and lighter products, and longer battery life. Demand has risen sharply for low power consumption in battery-powered hand-held systems owing to the key requirement to reduce power dissipation to extend service. Even in high-end computer systems, low power is still a critical design consideration, since the expensive cooling and packaging costs and lower reliability associated with high-level on-chip power dissipation are significant.
High-level synthesis consists of scheduling, binding and allocation, and in this dissertation the main focus falls on the multiple voltages scheduling aspect. The multiple voltage technique is one of several useful techniques in the low power design field. The multiple voltage scheduling refers to the assignment of a voltage level to each operational node in a data flow graph to minimize the total power consumption within a given computation time. In this dissertation, we propose two multiple voltage scheduling methods: multiple supply voltage (MSV) scheduling and dual supply voltage and dual threshold voltage (DSDT) scheduling. Unlike previous research, which focused on the operational nodes in the critical path and used the slack time to change the voltage of other nodes, our methods deal with all nodes without considering whether a node is in the critical path, our method deals with all nodes without considering whether a node is in the critical path. The advantage of this method is that the voltage assignment becomes very flexible. In the MSV scheduling, we analyze and compare the multiple voltage effect on high-level synthesis, and in DSDT scheduling, we take into account not only the dynamic power but also the static power consumption. Besides, a special algorithm which combines genetic algorithm and simulated annealing algorithm is proposed to solve the high-level dual-voltage scheduling problem.
Subjects
低功率
多重電壓
排程
low power
high-level synthesis
multiple voltage
scheduling
Type
thesis
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