A 110-MHz 84-dB CMOS programmable gain amplifier with integrated RSSI function
Journal
IEEE Journal of Solid-State Circuits
Journal Volume
40
Journal Issue
6
Pages
1249-1258
Date Issued
2005
Author(s)
Wu, C.-P.
Abstract
This paper describes a CMOS programmable gain amplifier (PGA) that maintains a 3-dB bandwidth greater than 110 MHz and can provide an 84-dB gain control range with 1-dB step resolution. The PGA can also be operated in a low-power mode with 3-dB bandwidth greater than 71 MHz. Integrated with this PGA is a CMOS successive logarithmic detecting amplifier with a /spl plusmn/0.7-dB logarithmic accuracy over an 80-dB dynamic range. It achieves -83-dBm sensitivity and consumes 13 mA from a single 3-V supply in the normal power mode. The chip area, including pads, occupies 1.5/spl times/1.5 mm/sup 2/.
SDGs
Type
journal article