A 40GHz fractional-N frequency synthesizer in 0.13 μ CMOS
Journal
The 2008 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Pages
295-298
Date Issued
2008-06
Author(s)
Abstract
A 40GHz fractional-N frequency synthesizer with a divide-by-64/64.5/65/65.5 fractional multi-modulus divider (MMD) is presented. A second-order 24-bit delta-sigma modulator is used to modulate the fractional MMD. This fractional MMD provides a half division step of a conventional integer MMD. Therefore, a better frequency resolution can be obtained. This frequency synthesizer has been fabricated in a 0.13um CMOS process. The measured fractional spur is below −50dB. The measured phase noise is −75.3dBc/Hz and −93.24dBc/Hz at 1MHz and 3MHz offset, respectively. The die area is 1.34 x 1.26 mm 2 and the power dissipation is 105mW from the supply of 1.5V.
SDGs
Type
conference paper