Analogue BiCMOS squarer and its applications
Journal
Electronics Letters
Journal Volume
35
Journal Issue
5
Pages
361-363
Date Issued
1999-03
Author(s)
Cheng-Chieh Chang
Abstract
A BiCMOS squarer using active attenuators which has been fabricated in a 10 µm BiCMOS process is presented. Experimental results show that the nonlinearity of the squarer can be kept below 2% across the entire input voltage range of ±0.3 V. Its –3 dB bandwidth is measured to be ~1 MHz. Moreover, based on the proposed squarer circuits, a four-quadrant multiplier and a vector summation circuit have also been realised. The proposed circuits are expected to be useful in analogue signal processing applications.
SDGs
Type
journal article