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  4. A 0.8 V switched-opamp bandpass ΔΣ modulator using a two-path architecture
 
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A 0.8 V switched-opamp bandpass ΔΣ modulator using a two-path architecture

Journal
2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings
Pages
1-4
Date Issued
2002-08
Author(s)
Hsiang-Hui Chang
Shang-Ping Chen
Kuang-Wei Cheng
SHEN-IUAN LIU  
DOI
10.1109/apasic.2002.1031517
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/299159
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84966293681&doi=10.1109%2fAPASIC.2002.1031517&partnerID=40&md5=8652c6a7d6a9c80e612d7fb19f5dda0b
Abstract
In this paper, a very low-voltage fourth-order bandpass delta-sigma modulator with a two-path architecture is presented. Using the modified switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without any voltage multiplier or bootstrapping switch. Realized in a 0.25 μm 1P5M standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 60.6 db and a dynamic range (DR) of 68 db in a 30 kHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm2. © 2002 IEEE.
Other Subjects
Bandpass amplifiers; Bandpass filters; CMOS integrated circuits; Delta sigma modulation; Operational amplifiers; Signal to noise ratio; Bandpass delta sigma modulators; Bandpass delta-sigma modulator; Distortion ratio; Signal bandwidth; Standard CMOS process; Supply voltages; Very low voltage; Voltage multipliers; Modulators
Type
conference paper

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