Process Development and Tunneling Current Characteristics of MOS Structure with HfO2/SiO2 Dielectrics
Date Issued
2014
Date
2014
Author(s)
Pang, Chin-Sheng
Abstract
Through the continuous development of IC industry, the studies of electrical and material properties become even more important for the investigation of device performance and reliability. The MOS capacitor with structures of Al/HfO2/SiO2/Si and Al/SiO2/Si are fabricated in this work. The SiO2 layer is formed by anodization oxidation (ANO) technique, while nitride acid oxidation (NAO) is used after the sputtering of Hf in order to form a HfO2 dielectric layer. Both methods not only show an advantage of cost-effective process but could also be carried out in room temperature environment. Numerous electrical characterizations, for example, capacitance-voltage (C-V), current-voltage (I-V), constant current stress (CCS), constant voltage stress (CVS), and time-zero dielectric breakdown (TZDB) etc., are performed followed by further analyses and discussions.
Three samples with different structures of Al/SiO2/Si (S), Al/HfO2/SiO2/Si (H), and Al/3HfO2/SiO2/Si (3H, with HfO2 layer stacking 3 times) are fabricated in chapter 2. The measurement under dark and illumination is the focus in this chapter. The co-existence of the deep depletion (from C-V) and the current saturation (from I-V) was observed. In addition, the illumination sensitivity is found higher for sample H than S. The area-dependence or perimeter-dependence of the saturation current under various illumination intensities for three structures with different dimension patterns is also investigated.
In chapter 3, samples of structure Al/HfO2/SiO2/Si with different manufacturing processes are fabricated, and the differences of electrical analyses are discussed. In the first part of this chapter, it demonstrates that sample with tandem HfO2 dielectric layer as gate dielectric structure has a higher breakdown field in TZDB test. The importance of interfacial layer (IL) for maintaining good interface quality is also discussed in this part. In the second part, three samples with different durations of postoxidation annealing (POA) are fabricated. We conclude that the sample with a longer duration of POA (30 mins) has better electrical performances including C-V, I-V, trapping characteristic, reliability, and illumination sensitivity.
The summary is given in chapter 4. Possible future works are proposed to further explore the fundamental physics and mechanisms of MOS capacitors with various materials and physical thickness of the gate dielectric layer.
Subjects
金氧半電容元件
電性量測
高介電係數材料
介電層堆疊結構
穿隧電流
Type
thesis
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