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College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
Fault Simulation and Test Pattern Selection for Small Delay Defect Using GPU
Details
Fault Simulation and Test Pattern Selection for Small Delay Defect Using GPU
Journal
VLSI/CAD
Date Issued
2013-01
Author(s)
CHIEN-MO LI
SC Hsu
KY Liao
CHIEN-MO LI
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/381711
Type
conference paper