A test clock reduction method for scan-designed circuits

Resource

Test Conference, 1994. Proceedings., International

Journal

Test Conference, 1994. Proceedings., International

Pages

-

Date Issued

1994-10

Date

1994-10

Author(s)

Chang, Jau-Shien

Lin, Chen-Shang

DOI

DOI

N/A

URI

Type

journal article

File(s)

Name

00527967.pdf

Size

842.72 KB

Format

Adobe PDF

Checksum

(MD5):07512c4c8954879421ba6a2b3e69ee90