A Yield Optimization Technique for Operational Amplifier
Date Issued
2006
Date
2006
Author(s)
Ko, Cheng-Hsiu
DOI
en-US
Abstract
As the IC fabrication technology becomes increasingly complicated with the scaling down of device feature size, the performance requirements and deadlines in analog IC are becoming more and more difficult to satisfy. The cost of DFM (design-for-manufacturability) is getting higher and higher.
In this thesis, we propose a method to evaluate the yield of an operational amplifier and to optimize the opamp's manufacturing yield in the existence of process variations, with the designer provided circuit schematic, set of circuit design variables, and the design variable constraints. A yield analysis and optimization tool is implemented and the idea is validated with an example opamp. The proposed approach is not restricted to amplifiers and can be used to optimize the design of other types of circuits as well.
Subjects
良率最佳化
yield optimization
Type
thesis
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