A 13.56-MHz Passive NFC Tag IC in 0.18-μm CMOS Process for Biomedical Applications
Journal
IEEE VLSI-DAT
Pages
1月5日
Date Issued
2016
Author(s)
Abstract
This paper presents a low power and area-efficient passive tag IC for biomedical applications. CMOS gate cross-coupled rectifier with a diode is built to achieve high power conversion efficiency without redundant control circuits. The demodulator adopts the adaptive threshold generation technique to detect the small RF envelope changes on 10% ASK signals. Inverter-based clock generator consumes only few μW to provide high precision clock for load modulation. This tag IC is fabricated in a 0.18-μm CMOS process. Total power consumption for analog block is 67.7 μW under a 1.8-V supply and the chip size is 0.68 mm 2 .
SDGs
Type
conference paper