An Offset Cancellatino Technique for WCDMA Direct-Conversion Receivers
Date Issued
2005
Date
2005
Author(s)
Sun, Chih-Pin
DOI
en-US
Abstract
The ability to communicate with people on the move has evolved remarkably, and new wireless communications methods have been enthusiastically adopted by people throughout the world. The mobile radio communications industry has grown by orders of magnitude because of the digital and RF circuit fabrication improvements, new large-scale circuit integration and other miniaturization technologies which make portable radio equipment smaller, cheaper and more reliable.
For mobile receiver design, direct-conversion receivers are most important architecture for monolithic integration. But, DC offsets in direct-conversion receivers is one of the critical problems. Lots of the offset cancellation techniques are developed to enhance the receiver performance, and provide large dynamic range for the baseband circuit.
In this thesis, we describe the implementation and measurement results of offset cancellation architecture for WCDMA mobile system. A system simulation indicates the offset cancellation must provide a 10-kHz corner frequency. A channel selection filter is also integrated in the chip to provide 40-dB adjacent channel selectivity. The offset cancellation is composed of a FDNR based load to provide a DC feedback loop to correct the offset voltage. Simulation results show that only quarters of capacitors can be used to provide the same corner frequency and attenuation compared with the conventional servo loop. The chip consumes 8 mW from a 1.8-V supply and is fabricated in a 0.18-μm CMOS technology.
Subjects
基頻電路
直流偏壓偏差消除
直接降頻接收機
baseband circuit
DC offset cancellation
Direct conversion receiver
Type
thesis
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