Analysis of the Capacitance Behavior of Narrow-Channel FD SOI NMOS Device Considering the 3D Fringing Capacitances Using 3-D Simulation
Date Issued
2006
Date
2006
Author(s)
Chen, Jian-Zhong
DOI
zh-TW
Abstract
This thesis reports the analysis of the Gate-Source/Drain
and Source/Drain-Gate capacitance behavior of narrow channel FD SOI NMOS Device considering the fringing capacitance.
The first chapter introduces the characteristic of the SOI Device and the Mesa Isolation SOI Device. Moreover, we also account for the impact of Fringing Electric Field Effect on the Small- Geometry SOI Device.
The second chapter compares the impact on the total capacitance behavior of different channel width SOI Device due to the Fringing Capacitance Effect .we also compute out the percentage contribution of the fringing capacitance on the total capacitance. Above all, we simulate out the relationship of fringing capacitance and channel width to understand the accidence of the fringing capacitance on the different channel width.
The third chapter compares the Mesa Isolation SOI Device which uses or not uses Lightly-Doped-Drain on the analysis of DC characteristic and the Gate-Source/Drain capacitance behavior affected by the fringing capacitance.
Subjects
絕緣體上矽
邊緣電場
窄通道
邊緣電容
電容
SOI
fringing electric field
narrow channel
fringing capacitance
capacitance
Type
thesis
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