Characterization, Modeling and Application of Deep Depletion from MOS Capacitors with Ultrathin Oxides
Date Issued
2012
Date
2012
Author(s)
Cheng, Jen-Yuan
Abstract
In this work, a comprehensive study on tunneling induced deep depletion (DD) behavior with ultra-thin oxide (2.0 to 2.8nm) of MOSCAPs was investigated from C-V curves experimentally. With comparing the C-V and J-V diagrams simultaneously, it was found that the initiation voltage of DD increases with EOT and early occurrence of DD was observed after oxide breakdown.
A new methodology named local depletion capacitance (LDC) model was introduced to evaluate the electrical uniformity quantitatively via C-V in DD region. It was found that the electrical uniformity increases with EOT for SiO2 MOSCAP. In contrast, the HfO2 MOSCAP shows opposite result to SiO2, the electrical uniformity decrease with the EOT.
We then therefore extended the tunneling induced DD concept to study the downward C-V from depletion-inversion to DD, the edge fringing effect (EFE) was successfully characterized by EFE based quantum-mechanical C-V incorporated LDC model approach. The result suggested the EFE has a great impact on the device perimeter, i.e., enhanced the edge depletion width of the device.
With utilizing the EFE enhanced edge depletion concept, the perimeter-light-absorption (PLA) type MOS tunneling photodiode prototype was demonstrated. Via direct observation enhanced DD at edge via HfO2/SiO2, the sensitivity was recognized a greater improvement (3,000x) than previous research using SiO2 as dielectric (100x).
In the appendix of this work, we briefly reported the research in UC Berkeley (with Device Group, Department of Electrical Engineering and Computer Science), funded by National Science Council (NSC) of Taiwan government. Owing to extreme scaling trend, a tremendous low power demand was aroused. The sub-threshold swing (SS) oriented design brings birth to negative-capacitance MOSFET (NCFET) at Berkeley. A non-hysteresis mode (from the latest study in IEDM 2011) in NCFET was adopted here with the whole new thin-silicon-on-conductor (TSOC) architecture. The sub-60mV/dec (Boltzmann’s Limits) can be achieved experimentally, i.e., the 28.3mv/dec operation was obtained without additional strain enhancement.
Subjects
deep depletion
MOSCAPs
non-uniformity
high-k dielectric
tunneling photodiode
edge fringing effect
sub-threshold swing
negative capacitance MOSFET
ferroelectric materials
Type
thesis
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