Analysis, Design and Implementation of Control IC for Reducing Switched-Mode Power Supply Standby Power Loss
Date Issued
2009
Date
2009
Author(s)
Tzeng, Ren-Huei
Abstract
In the switched mode power supply (SMPS) industry, criteria play an important role to develop the SMPS. Of the criteria, the standby mode efficiency is an important issue of the future power supply design. Reduction in power consumption in the standby mode condition is the primary and tough target of the power supply design in the recent years. In general literature, two techniques applied to improve the performance of the standby mode condition are the green-mode technique, applied to essentially decrease switching frequency and novel gate driving methods, facilitating to further reduce the power consumption of each switching cycle.his dissertation gives brief background knowledge of power supply and reviews the techniques for SMPS standby mode performance enhancement. Also, in this dissertation, a driving method is developed to reduce the power consumption of each switching cycle. The method is to use a regulated gate driver to eliminate unnecessary gate driving voltage to reduce the driving power consumption. The proposed gate driver is completely designed on chip and does not need extra off-chip components. Moreover, it is simpler than other efficient gate drivers in the literatures. Compared with the non-regulated gate driver, the power dissipation of the proposed gate driver can be reduced up to 55.4% under 30V supply voltage in the experiment. Besides, this dissertation also proposes a regulated supply voltage controller. With the better coupling coefficient of primary winding and the auxiliary winding, the supply voltage controller can manage the power distribution according to varied load conditions. And it can regulate the supply voltage in normal operation to decreasing the power consumption of the control chip.
Subjects
Off line SMPS
standby mode
gate driver
switching loss
supply voltage
driving voltage
Type
thesis
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