單晶片電視調諧器之經濟有效測試方法
Date Issued
2004-11-30
Date
2004-11-30
Author(s)
DOI
922622E002040CC3
Abstract
This report develops an economic and effective test methodology for single chip
TV tuners. Three techniques will be applied to achieve this goal: 1. Statistic
circuit simulation, 2. Test flow simplification, and 3. Post test data analysis.
The statistic circuit simulation predicts the test results of TV tuners under
process parameters variation.
Subjects
電視調諧器測試
射頻測試方法
Publisher
臺北市:國立臺灣大學電子工程學研究所
Type
report
File(s)![Thumbnail Image]()
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Name
922622E002040CC3.pdf
Size
165.86 KB
Format
Adobe PDF
Checksum
(MD5):9df00c352eb061e811f52cda63e488d7
