A 20-Gb/s Adaptive Equalizer in 0.13 μm CMOS Technology
Journal
IEEE Journal of Solid-State Circuits
Journal Volume
41
Journal Issue
9
Pages
2058-2066
Date Issued
2006-09
Author(s)
Abstract
An adaptive equalizer incorporates spectrum-balancing technique to achieve high speed and low power dissipation. Obviating the need for slicers, this circuit compares the low and high frequency components of the data spectrum and adjusts the boosting accordingly. Fabricated in 0.13-μm CMOS technology, this circuit achieves a data rate of 20 Gb/s while consuming 60 m W from a 1. 5-V supply. © 2006 IEEE.
SDGs
Type
journal article