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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Efficient approach for via minimization in multi-layer VLSI/PCB routing
Details
Efficient approach for via minimization in multi-layer VLSI/PCB routing
Journal
Custom Integrated Circuits Conference
Pages
473-476
Date Issued
1995
Author(s)
Cherng, Jong-Sheng
Chen, Sao-Jie
Tsai, Chia-Chun
Ho, Jan-Ming
SAO-JIE CHEN
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-0029225859&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/316424
Type
conference paper