Diagnosis of Resistive-Open and Stuck-Open Defects in Digital CMOS ICs
Resource
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS & SYSTEMS 24(11), 1748-1759
Journal
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS & SYSTEMS 24(11)
Pages
1748-1759
Date Issued
2005-11
Date
2005-11
Author(s)
Li, Chien-Mo James
McCluskey, Edward J.
DOI
246246/200611150121533
Abstract
Aresistive-open defect is an imperfect circuit connection
that can be modeled as a defect resistor between two circuit
nodes that should be connected. A stuck-open (SOP) defect is a
complete break (no current flow) between two circuit nodes that
should be connected. Conventional single stuck-at fault diagnosis
cannot precisely diagnose these two defects because the test results
of defective chips depend on the sequence of test patterns.
This paper presents precise diagnosis techniques for these two
defects. The diagnosis techniques take the test-pattern sequence
into account, and therefore, produce precise diagnosis results.
Also, our diagnosis technique handles multiple faults of different
fault models. The diagnosis techniques are validated by experimental
results. Twelve SOP and one resistive-open chips are
diagnosed out of a total of 459 defective chips.
that can be modeled as a defect resistor between two circuit
nodes that should be connected. A stuck-open (SOP) defect is a
complete break (no current flow) between two circuit nodes that
should be connected. Conventional single stuck-at fault diagnosis
cannot precisely diagnose these two defects because the test results
of defective chips depend on the sequence of test patterns.
This paper presents precise diagnosis techniques for these two
defects. The diagnosis techniques take the test-pattern sequence
into account, and therefore, produce precise diagnosis results.
Also, our diagnosis technique handles multiple faults of different
fault models. The diagnosis techniques are validated by experimental
results. Twelve SOP and one resistive-open chips are
diagnosed out of a total of 459 defective chips.
Subjects
Automatic test pattern generation (ATPG)
fault
diagnosis
diagnosis
testing
very large scale integration (VLSI)
Publisher
Taipei:National Taiwan University Dept Mech Engn
Type
journal article
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