Design of a Continuous-Time Delta-Sigma Modulator with Single-Amplifier-Biquad (SAB) Filter and DWA-Embedded Quantizer
Date Issued
2015
Date
2015
Author(s)
Huang, Wei-Hsiang
Abstract
Two works are included in this thesis. The first work is a 4th-order 4-bit CTDSM. With proposed SAB-based loop filter, 4th-order noise shaping is achieved with two local resonators while using only two op-amps and two DACs. A low-power interpolating flash quantizer with an embedded random-skipped incremental data weighted averaging (RS-IDWA) function is presented. The proposed RS-IDWA function addresses nonlinearity issues of the quantizer and feedback DACs. Fabricated in 90 nm CMOS, the proposed CTDSM achieves peak SNDR of 68 dB over 13 MHz signal bandwidth, while consuming 5.1 mW at 320 MHz sampling frequency, and scores an FoM of 95 fJ/conv.-step. The second work is a 4th-order 3 bit CTDSM consisting of SAB-based loop filter and VCO-based-quantizer. With the high gain of preceding 3rd-order loop filter and using two VCO-based quantizer in a pseudo-differential manner, nonlinearity in the transfer curve can be suppressed. Mismatch in two DAC segments are further linearized with proposed PRBS function. Fabricated in 90 nm CMOS, the proposed CTDSM achieves peak SNDR of 67.5 dB over 8 MHz signal bandwidth, while consuming 4.4 mW at 360 MHz sampling frequency, and scores an FoM of 142 fJ/conv.-step.
Subjects
Continuous-Time Delta-Sigma Modulator
Type
thesis