RF CMOS Circuit and Receiver Front-End Architecture Designs for Wireless Network
Date Issued
2004
Date
2004
Author(s)
Hou, Chun-Chih
DOI
zh-TW
Abstract
The object of this research is to develop the RF CMOS circuits and receiver front-end architectures for wireless communications. In RF circuits, passive components including resistors, capacitors, varactors, and inductors are very crucial, and will be discussed respectively. A spiral inductor test-key is designed and measured, and a wide-band model is used to fit its RF characteristics. A voltage control oscillator (VCO) using a symmetric spiral inductor is also designed and measured. The coupling characteristic of inductors is discussed by the testing results of a 5.7-GHz low noise amplifier (LNA). The key function blocks in the RF part of a receiver chain are the LNA and mixer. Both will be discussed and designed in 0.18mm CMOS technology respectively. One mixer was fabricated. The measured results are used to verify the design.
People obtain more convenience and efficiency from wireless communication than wired communication. The IEEE Standards Committee draws up several standards of Wireless Local Area Network (WLAN) for this purpose. The Std. 802.11a/b/g are targeted at the application of internet and video stream access. The detailed specifications of IEEE 802.11a will be derived, including the linearity, noise, gain budget, filtering, and ADC requirements. The complete RF receiver chain, including the LNA, mixers, VCO, frequency divider, and buffer are designed. The total power consumption is 96 mW under 1.8-V supply voltage. The layout area, including the pads, is 6.06 mm2, using 0.18mm CMOS 1P6M process.
A receiver that can process two signal bands, called dual-band receiver, is a trend in WLAN markets because of its compatibility and convenience. An RF front-end of dual-band receiver is proposed. Its two components, dual-band LNA and mixer, are designed and taped out. Technology of 0.18mm CMOS 1P6M is used, and the chip occupies an area of 1.76 mm2. The supply voltage is 1.8 V, drawing a power of 24 mW.
Besides WLAN, the circuits for Wireless Personal Area Network (WPAN), which is for low power and low cost applications in home automation and networking, are also designed. Low voltage and low power LNA and mixer are discussed and simulated. The power consumption is less than 4 mW, and all the physical specifications meet the IEEE 802.15.4 standard.
People obtain more convenience and efficiency from wireless communication than wired communication. The IEEE Standards Committee draws up several standards of Wireless Local Area Network (WLAN) for this purpose. The Std. 802.11a/b/g are targeted at the application of internet and video stream access. The detailed specifications of IEEE 802.11a will be derived, including the linearity, noise, gain budget, filtering, and ADC requirements. The complete RF receiver chain, including the LNA, mixers, VCO, frequency divider, and buffer are designed. The total power consumption is 96 mW under 1.8-V supply voltage. The layout area, including the pads, is 6.06 mm2, using 0.18mm CMOS 1P6M process.
A receiver that can process two signal bands, called dual-band receiver, is a trend in WLAN markets because of its compatibility and convenience. An RF front-end of dual-band receiver is proposed. Its two components, dual-band LNA and mixer, are designed and taped out. Technology of 0.18mm CMOS 1P6M is used, and the chip occupies an area of 1.76 mm2. The supply voltage is 1.8 V, drawing a power of 24 mW.
Besides WLAN, the circuits for Wireless Personal Area Network (WPAN), which is for low power and low cost applications in home automation and networking, are also designed. Low voltage and low power LNA and mixer are discussed and simulated. The power consumption is less than 4 mW, and all the physical specifications meet the IEEE 802.15.4 standard.
Subjects
雙頻
壓控振盪器
互補金氧半
混波器
除頻器
802.15.4
802.11a/b/g
螺旋電感
無線區域網路
低雜訊放大器
zig-bee
dual-band
divider
WLAN
CMOS
VCO
mixer
LNA
spiral inductor
Type
thesis
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