Design of Front-end Circuits and a Super-Regenerative Receiver for Wireless Piezoresistive Sensing Applications
Date Issued
2011
Date
2011
Author(s)
Hsiao, Po-Yun
Abstract
In this work, the front-end circuit and a 400-MHz super-regenerative receiver for piezoresistive sensing applications are implemented.
The proposed front-end circuit for piezoresistive sensor composes an oscillator to transfer the resistance information into frequency domain and a mixer to down-convert the frequency to lower frequency for digitizing the resistance information. The down-conversion operation is an amplifier in time domain which can increase the system sensitivity to resistance variation. To calibrate the output frequency of mixer before sensing, the oscillation frequency is tuned from the maximum frequency to fix the difference with the reference frequency. The front-end circuit is fabricated in a TSMC 0.35-mm CMOS technology. The oscillation frequency is 24 MHz; the output frequency of mixer is 100 kHz. The total front-end circuit consumes 1 mW with 3-V supply. The system sensitivity is 7 kHz/Ohm
The proposed super-regenerative receiver adopts the theorem of delta-sigma modulator to demodulate the received signal to improve the limitation of the conventional demodulator. A fast frequency calibration is also proposed by the meaning of SAR algorithm to regulate the oscillation frequency to the specific frequency band, 400 MHz. The receiver is fabricated in TSMC 0.18-mm CMOS technology. It consumes 1.37 mW with 1-V supply. The system sensitivity is -50 dBm. The energy efficiency is 1.37 nJ/bit with 1-Mbps input signal. The calibration time is 250 ns.
Subjects
Piezoresistive sensor
Super-regenerative receiver
fast frequency calibration
Delta-Sigma pulse-width demodulator
SDGs
Type
thesis
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