Partitioned gate tunnelling current model considering distributed effect for CMOS devices with ultra-thin (1 nm) gate oxide
Journal
IEE Electronics Letters
Journal Volume
42
Journal Issue
3
Pages
182-184
Date Issued
2006-02
Author(s)
Abstract
The partitioned gate tunnelling current model considering the distributed effect for CMOS devices with an ultra-thin (1 nm) gate oxide is reported. As verified by the experimentally measured data, the partitioned gate tunnelling current model considering the distributed effect provides a better prediction of the total gate, drain and source currents as compared to the BSIM4 model.
Other Subjects
Electric currents; Electron tunneling; Gates (transistor); Mathematical models; Distributed effect; Gate oxide; Gate tunnelling current; Source currents; CMOS integrated circuits
Type
journal article
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