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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
A Novel 0.8V BP-DTMOS Content Addressable Memory Cell Circuit Derived from SOI-DTMOS Techniques
Details
A Novel 0.8V BP-DTMOS Content Addressable Memory Cell Circuit Derived from SOI-DTMOS Techniques
Journal
IEEE Conference on Electron Devices and Solid State Circuits
Pages
243-245
Date Issued
2003-07
Author(s)
E. Shen
J. B. Kuo
JAMES-B KUO
DOI
10.1109/edssc.2003.1283523
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/304105
SDGs
[SDGs]SDG7
Type
conference paper
