Using Embedded Shadow Page Table to Improve the Performance of QEMU 64-bit Architecture System Emulation
Date Issued
2016
Date
2016
Author(s)
Hsiao, Kuang-Hung
Abstract
This thesis investigates the effectiveness of using Embedding Shadow Page Table (ESPT) to improve 64-bit guest architecture emulation performance on 64-bit host system by embedding part of guest virtual address space into host virtual address space. We divide 64-bit system emulation into two cases, restricted case and general case, based on whether the size of 64-bit guest operating system supported virtual address space is smaller than the size of available host virtual address space. We proposed two ESPT system designs for those two cases. In AArch64-to-x86_64 system emulation, our restricted case ESPT system achieves an average speedup of 1.47 on SPEC CINT2006 benchmarks compared with QEMU. Our not yet complete general case ESPT system only improves five out of twelve benchmarks and achieves a speedup of only 1.09. However, neither of our system designs can improve system boot benchmarks.
Subjects
memory virtualization
cross-ISA dynamic binary translation
embedded shadow page table
system mode emulation
Type
thesis
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ntu-105-R03922081-1.pdf
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