High Mobility Strained-Ge Channel Field Effect Transistor
Date Issued
2005
Date
2005
Author(s)
Wang, Pei-Ling
DOI
en-US
Abstract
A novel structure with a 4-nm-thick Ge layer epitaxially grown on Si substrate (100) was simulated and characterized for applications to high-speed transistors. Raman spectra confirmed the compressive strain (~1.25%) in the Ge channel. The ultra thin Ge (~ 4 nm) channel on Si substrate has advantages of low defect density and hole mobility enhancement due to the compressive strain. No conspicuous defect observed in transmission electron microscope (TEM) and the strong electroluminescence (EL) from epi-Ge (ε-Ge) indicates the low defect density.
For numerical simulations of strained-Ge channel devices, strain effects on the band alignments and bandgaps of the Si-cap/ε-Ge heterostructure have been analyzed. The corresponding parameters calculated by theories are applied in the simulations.
Optimization of structure design regarding Ge layer thickness TGe and Si-cap layer thickness TSiCap have been carried out in order to achieve better performance. Thinner TGe can’t confine hole wavefunction effectively while thicker TGe leads to more dislocations. On the other hand, thinner TSiCap are preferred since it can increase gate-to-channel capacitance, but may worsen Ge diffusion as well as non-uniform oxide/semiconductor interface. Simulations and theoretical results reveal that 1-nm-thick TSiCap and 4-nm-thick TGe are appropriate and thus are targeted in this work.
The drive current improvements of the conventional implanted source/drain strained-Ge channel p-MOSFETs compared with that of bulk Si are found to be ~2x at saturation region. The holes confinement shoulder is observed on the capacitance-voltage characteristics at inversion region, indicating that a thin layer of Si-cap remains after the device process.
Conventional implanted source/drain strained-Ge channel n-MOSFETs are also investigated. The Si-cap is thin (~1nm) enough to enable the electron wave function to penetrate into high mobility buried Ge layer. It exhibits ~40% current enhancement as compared to the bulk Si device.
Schootky barrier MOSFETs(SBMOSFETs) is a promising application in the future. The Pt Schottky barrier strained-Ge channel p-MOSFETs with the conventional SiO2 as gate dielectrics reveal a ~3.2x mobility enhancement. The successful combination of strained-Ge channel and SBMOSFETs shows great potential in the CMOS technology.
Subjects
應變鍺
strained-Ge
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-94-R92943055-1.pdf
Size
23.31 KB
Format
Adobe PDF
Checksum
(MD5):e08c546b1c23e1573bee36f0cd1c173c