Test Pattern Modification for Average IR-Drop Reduction
Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal Volume
24
Journal Issue
1
Pages
38-49
Date Issued
2016
Author(s)
Abstract
This paper presents a novel technique that modifies automatic test pattern generation test patterns to reduce time-averaged IR drop of a test pattern. We propose a fast average IR drop estimation, which is very close to the time-averaged IR drop of time-consuming transient simulation (R2 =0.99). We calculate the contribution of every node to these nodes inside IR-drop hotspot so that we can effectively modify only a few don't care bits in the test patterns to reduce IR drop. The experimental results show that our technique successively reduces time-averaged IR drop by 10% with almost no fault coverage loss and no test pattern inflation.
SDGs
Type
journal article