A 1.5-V CMOS all-N-logic true-single-phase bootstrapped dynamic-logic circuit suitable for low supply voltage and high-speed pipelined system operation
Journal
IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing
Journal Volume
46
Journal Issue
5
Pages
628-631
Date Issued
1999-05
Author(s)
Abstract
This paper presents a 1.5-V CMOS true-single-phase (TSP) bootstrapped dynamic-logic (BDL) circuit using all-N-logic and bootstrapped circuit techniques for high-speed operation at a low supply voltage. As confirmed by the experimental results from the test chip implemented using a 0.8-μm CMOS technology, the speed performance of this CMOS all-N-logic TSP BDL circuit with four serial inputs is 75% faster at a supply voltage of 1.5 V, as compared to the conventional TSP dynamic-logic circuit. Using an all-N-logic TSP BDL circuit, the maximum operating frequency of an implemented digital quadrature modulator is 482 MHz at 5 V, and 68 MHz at 1.5 V, which is 27% faster compared to the circuit without using the BDL circuit. © 1999 IEEE.
SDGs
Type
journal article
