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  4. Design and Research of Key Components for Microwave and Millimeter-Wave Systems
 
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Design and Research of Key Components for Microwave and Millimeter-Wave Systems

Date Issued
2015
Date
2015
Author(s)
Huang, Tzu-Yuan
URI
http://ntur.lib.ntu.edu.tw//handle/246246/276626
Abstract
This thesis consists of three parts. The first part is a switching type phase shifter (STPS) and variable gain amplifier (VGA) using 90 nm CMOS technology. Different insertion losses while changing phase states will cause the amplitude error. To minimize the amplitude error of the STPS, a variable gain amplifier can be cascaded with the phase shifter to compensate the different loss at each state. The measured phase error is under 11.25° in 17.7 to 20.7 GHz. The variable gain amplifier has enough gain control range to cover the amplitude error caused by STPS. The second part is a distributed amplifier (DA) using new topology developed in 0.18-μm CMOS. The topology uses the combination of the DA with taper-sized transistors and the cascaded single-stage distributed amplifier (CSSDA). This proposed DA takes considerations of gain-band width (GBW) product, output power, noise figure (NF), dc power consumption, and compact size. By using DA with taper-sized transistors, this DA reduces dc power consumption while maintaining the RF performance. This DA achieves 25-dB gain and 34 GHz 3-dB bandwidth with total dc power of 176 mW. The maximum OP1dB is 7.2 dBm and the NF is between 6.5 and 8 dB at frequency lower than 25 GHz with the compact size of 0.86 mm2. This circuit exhibits the best figure of merit (FOM) in 0.18-μm CMOS and comparable performance with the DAs in advanced process. The third part is a power amplifier (PA) developed in 0.18-μm CMOS. The topology adopts the adaptive bias and pre-distortion linearizer simultaneously. The design of this PA takes back-off efficiency, linear output power, and quiescent power consumption into consideration. After linearization, the proposed PA achieves 6.8% PAE at 6-dB back-off from P1dB, 14.1% PAE at OP1dB, and high linear output power 9.2 dBm with third-order intermodulation distortion (IMD3) of -40 dBc. This circuit shows good performance compared with the published PAs in 0.18-μm CMOS and suitable for high data rate transmission applications.
Subjects
CMOS
switching type phase shifter
variable gain amplifier
distributed amplifier
power amplifier
Type
thesis
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ntu-104-R01942018-1.pdf

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