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  4. Application on Silicon Wafer Grinding Process Performance Enhancement
 
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Application on Silicon Wafer Grinding Process Performance Enhancement

Date Issued
2004
Date
2004
Author(s)
Tu, Chi-Hsu
DOI
zh-TW
URI
http://ntur.lib.ntu.edu.tw//handle/246246/61119
Abstract
Grinding has gained important status in the IC packaging , wafer manufacture and wafer reclaim industry. Grinding process could reach low TTV (Total Thickness Variation) , excellent surface roughness , rapid material removal rate , reduced cycle time and higher automation level. To avoid deep subsurface damage layer and reduce warpage caused by residual stress , assessment should be made prior to production run for the industry. This study will concentrate on grinding 8 inches silicon wafers , and three stages were planned. First , ductile regime grinding and cross-section method are introduced to investigate the subsurface damage layer and critical depth of cut , under the influence of grinding parameters and wheel types. Second , measurement of grinding temperature between grinding wheel and wafer surface device is made. With the relation between warp and grinding temperature established from first step , grinding parameters and suitable surfactant in the cooling water will drop the interface temperature and , hence , leading to lower warp . Third , front side etching and Stoney’s formula will be used to calculate the residual stress and attempt is made to forecast the subsurface damage layer depth.
Subjects
輪磨
翹曲
次表面破壞層
subsurface damage
warp
grinding
Type
thesis
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ntu-93-R91522732-1.pdf

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Adobe PDF

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(MD5):b32ca6e766e099f84b9aa18d56c57725

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