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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Automatic VLSI Circuit Synthesizer System Vol.1:A Programming Logic Array (PLA) Reduction and Generation System
Details
Automatic VLSI Circuit Synthesizer System Vol.1:A Programming Logic Array (PLA) Reduction and Generation System
Date Issued
1985-09
Date
1985-09
Author(s)
Feng, Wu-Shiung
Yu, Hui-Jung
URI
http://ntur.lib.ntu.edu.tw//handle/246246/106153
Type
report
