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  4. Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering
 
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Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering

Resource
Acoustics, Speech, and Signal Processing, 2005. Proceedings. (ICASSP '05). IEEE International Conference on
Journal
ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
Journal Volume
V
Pages
V93-V96
Date Issued
2005
Author(s)
Huang, C.-T.
Chen, C.-Y.
Chen, Y.-H.
LIANG-GEE CHEN  
DOI
10.1109/ICASSP.2005.1416248
URI
https://www.scopus.com/inward/record.uri?eid=2-s2.0-33646424425&doi=10.1109%2fICASSP.2005.1416248&partnerID=40&md5=d99640b3f5b72b44b9e80025e356da9a
Abstract
To the best of authors' knowledge, this paper presents the first work on memory analysis of VLSI architectures for Motion-Compensated Temporal Filtering (MCTF). The open-loop MCTF prediction scheme has led the revolution for hybrid video coding methods that are mainly based on the close-loop MC Prediction (MCP) scheme, and it also becomes the core technology of the coming video coding standard, MPEG-21 part 13 - Scalable Video Coding (SVC). In this paper, the macroblock(MB)-level and frame-level data reuse schemes are analyzed for the MCTF. The MB-level data reuse is especially for the Motion Estimation (ME), and the Level C+ scheme is proposed, which can further reduce the memory bandwidth of the conventional Level C scheme. Frame-level data reuse schemes for MCTF are proposed according to the open-loop prediction nature. © 2005 IEEE.
Other Subjects
Bandwidth; Database systems; Image coding; Motion estimation; Signal filtering and prediction; Memory analysis; Motion-Compensated Temporal Filtering (MCTF); Open-loop prediction; Scalable Video Coding (SVC); VLSI circuits
Publisher
2005 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '05
Type
conference paper
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