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  4. SFO: A scalable approach to fanout-bounded logic synthesis for emerging technologies
 
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SFO: A scalable approach to fanout-bounded logic synthesis for emerging technologies

Journal
Proceedings - Design Automation Conference
Journal Volume
2020-July
Date Issued
2020
Author(s)
Zhang H.-T
JIE-HONG JIANG  
DOI
10.1109/DAC18072.2020.9218500
URI
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85093968528&doi=10.1109%2fDAC18072.2020.9218500&partnerID=40&md5=02bef3b3cbf47f18c6064970666525f3
https://scholars.lib.ntu.edu.tw/handle/123456789/580981
Abstract
Fanouts are an essential element for signal cloning to achieve logic sharing, but can be a very limited resource in certain emerging technologies, such as quantum circuits, superconducting electronic circuits, photonic integrated circuits, and biological circuits. Although fanout synthesis has been intensively studied for high performance circuit synthesis, prior methods often treat fanout as a soft constraint for critical path optimization or target on specific high-fanout nets such as clock and reset signals. They are not particularly suited for circuit synthesis of these emerging technologies. By treating fanouts as first class citizens, the problem of fanout-bounded logic synthesis was posed as a challenge in the 2019 IWLS Programming Contest. In this paper, we present our winning method, which achieved the overall best quality in the competition, based on fanout load redistribution among existing or expanded equivalent signals. ? 2020 IEEE.
Subjects
Clone cells; Constrained optimization; Logic Synthesis; Circuit synthesis; Emerging technologies; Essential elements; High-performance circuits; Load redistribution; Photonic integrated circuits; Programming contests; Superconducting electronics; Computer circuits
SDGs

[SDGs]SDG9

Type
conference paper

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