A 10Gb/s inductorless CMOS analog equalizer with interleaved active feedback topology
Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal Volume
56
Journal Issue
2
Pages
97-101
Date Issued
2009-02
Author(s)
Abstract
A 10-Gb/s low-power analog equalizer for a 10-m coaxial cable has been realized in 0.13-μm CMOS technology. To compensate the cable loss of 20 dB at 5 GHz, this equalizer with an interleaved active feedback topology is proposed without using inductors. Moreover, additional capacitive and resistive source degenerations are incorporated to meet low-frequency losses. This circuit consumes only 14 mW (excluding the output buffer) from a 1.2-V supply with the output swing up to 400 mVpp, and it occupies 0.38 × 0.34 mm2. For 8-, 9-, and 10-Gb/s pseudorandom binary sequences (PRBSs) of 231 - 1, the measured maximum peak-to-peak jitters are 26, 34, and 40 ps, respectively, and the measured bit error rate (BER) is less than 10-12. © 2009 IEEE.
Subjects
Active feedback; CMOS; Equalizer; Inductorless
SDGs
Other Subjects
Binary sequences; Bit error rate; Cables; CMOS integrated circuits; Electric inductors; Equalizers; Topology; Active feedback; Active feedback topology; Analog equalizers; CMOS technology; Inductorless; Output Buffer; Pseudo-random binary sequences; Source degeneration; Feedback
Type
journal article