A 6.7MHz-to-1.24GHz 0.0318mm 2 fast-locking all-digital DLL in 90nm CMOS

Journal

International Solid-State Circuits Conference (ISSCC)

Pages

244-245

Date Issued

2012-02

Author(s)

Liang-Hsin Chen

Min-Han Hsieh

Shen-Iuan Liu

Charlie Chung-Ping Chen

DOI

URI

SDGs

[SDGs]SDG7

Type

conference paper