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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
A Low Jitter and Precise Multiphase Delay-Locked Loop Using Shifted Averaging VCDL
Details
A Low Jitter and Precise Multiphase Delay-Locked Loop Using Shifted Averaging VCDL
Journal
ISSCC 2003
Pages
434-435
Date Issued
2003-02
Author(s)
Hsiang-Hui Chang
Chih-Hao Sun
SHEN-IUAN LIU
DOI
10.1109/isscc.2003.1234373
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/304169
Type
conference paper
