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  4. Low Voltage High Polarization by Optimizing Scavenged WNx Interfacial Capping Layer at the Ru/HfxZr1‐xO2 Interface and Evidence of Fatigue Mechanism
 
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Low Voltage High Polarization by Optimizing Scavenged WNx Interfacial Capping Layer at the Ru/HfxZr1‐xO2 Interface and Evidence of Fatigue Mechanism

Journal
Advanced Materials Interfaces
Journal Volume
11
Journal Issue
23
ISSN
2196-7350
2196-7350
Date Issued
2024-06-27
Author(s)
Abhijit Aich
Asim Senapati
Zhao‐Feng Lou
Yi‐Pin Chen
Shih‐Yin Huang
Siddheswar Maikap
Min‐Hung Lee  
Chee Wee Liu  
DOI
10.1002/admi.202400185
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/720465
Abstract
AbstractIn this study, the double remnant polarization (2Pr) is enhanced from ≈2 to 25 µC cm−2 at a low applied voltage of ±2 V (or from 10 to 35 µC cm−2 at a voltage of ±4 V) by decreasing the WNx interfacial capping layer (ICL) thickness from 6 to 2 nm in a novel Ru/WNx ICL/Hf0.5Zr0.5O2(HZO)/TiN structure after annealing at 400 °C in a furnace. This occurs because of the higher orthorhombic (o) plus rhombohedral (r) phases (>70%), which is analyzed by geometrical phase analysis (GPA) of high‐resolution transmission electron microscope (HRTEM) images. An optimized 2 nm WNx ICL memory capacitor shows a low coercive field (Ec) of 1.27 MV cm−1 and long endurance of > 109 cycles (remaining 2Pr value of 13.5 µC cm−2) under a low field stress of ±2 MV cm−1 and 0.1 µs hold pulse width (or ≈1.67 MHz). Even this long endurance of > 109 cycles is obtained by applying a higher stress of ±2 MV cm−1, 1 MHz, or 100 kHz. Under ±3 MV cm−1 stress, the mechanism is caused by m‐phase growth from both the HZO/TiN bottom electrode (BE) and WNx ICL/HZO interfaces, which is evidenced by HRTEM images after 2 × 107 cycles for the first time.
Publisher
Wiley
Type
journal article

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