Design and Implementation of A Low Power Self-Testable Baseband Receiver
Date Issued
2004
Date
2004
Author(s)
Ko, Li-Wei
DOI
en-US
Abstract
In this thesis, a low power self-testable baseband receiver for a 5GHz wireless communication SoC is designed and implemented. Test power is reduced by eliminating unwanted switching activities in the combinational logic using the QN-Scan low power testing technique [Li 04]. Compared to a commercial BIST technique, the experimental results show that the reduction of power consumption is 24%. In addition, the single stuck-at fault coverage of our circuit is over 90% and the transition fault coverage is improved by 11.7% compared to an existing low power BIST technique.
Subjects
內建自我測試
低功率
直接序列展頻
無線通訊
Built-in Self Test
Wireless Communication
Low Power
Direct Sequence Spread Spectrum
Type
thesis
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ntu-93-R91943058-1.pdf
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23.31 KB
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Adobe PDF
Checksum
(MD5):8c7c100599dcd9a35bf74de38cde7ed0