The characteristics and simulations of Si/SiGe`heterojunction at strained-Si devices
Date Issued
2004
Date
2004
Author(s)
Wei, Jye-Yin
DOI
en-US
Abstract
Advanced Si processing technology has allowed MOSFETs to be scaled into nano regime, realizing incredible gains in performance and integration. Reductions of channel length and gate dielectric thickness have been the major factors for increasing MOSFET current drive and transconductance. However, as dimensions continue to decrease, certain physical constraints such as velocity saturation and the finite inversion layer thickness are being reached that limit continued scaling and the expected performance improvement.
One possible solution is to enhance the fundamental carrier transport properties in the semiconductor material, for example by using strain in Si-based heterostructures. Theoretical calculations indicate that inducing strain in Si will split the degeneracies at the conduction and valence band minima. Thin Si layers grown pseudomorphically on relaxed Silicon germanium (Si1-xGex) will be strained since relaxed Si1-xGex has a larger lattice constant than bulk Si. This produces enhanced in-plane carrier mobility in the strained-Si, as well as band offsets between the relaxed Si1-xGex and the strained Si, which can be used for carrier confinement in advanced device structures.
A variety of strained-Si/relaxed- Si1-xGex heterostructures were used to simulate the MOSFETs and compared to the experimental results.
Subjects
模擬
矽鍺
應變矽
simulation
C-V
SiGe
strained-Si
Type
thesis
File(s)![Thumbnail Image]()
Loading...
Name
ntu-93-R91943037-1.pdf
Size
23.31 KB
Format
Adobe PDF
Checksum
(MD5):e255bea716f997cd4c769cbcd32665aa