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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
An FPGA Memory Hierarchy for High-level Synthesized OpenCL Kernels
Details
An FPGA Memory Hierarchy for High-level Synthesized OpenCL Kernels
Journal
IEEE International Symposium on High Performance and Smart Computing (IEEE HPSC 2015)
Pages
1719-1724
Date Issued
2015-08
Author(s)
Hsiang-Yu Tseng
Ssu-Ting Liu
SHENG-DE WANG
DOI
10.1109/HPCC-CSS-ICESS.2015.210
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/394783
Type
conference paper
