A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture
Resource
ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on
Journal
2002 IEEE Asia-Pacific Conference on ASIC
Pages
-
Date Issued
2002-08
Date
2002-08
Author(s)
DOI
N/A
Abstract
In this paper, a very low-voltage fourth-order bandpass delta-sigma modulator with a two-path architecture is presented. Using the modified switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without any voltage multiplier or bootstrapping switch. Realized in a 0.25 μm 1P5M standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 60.6 db and a dynamic range (DR) of 68 db in a 30 kHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm2.
SDGs
Type
journal article
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