BiCMOS dynamic minimum circuit using a parallel comparison algorithm for fuzzy controllers
Journal
Electronics Letters
Journal Volume
29
Journal Issue
6
Pages
551-553
Date Issued
1993
Author(s)
Abstract
A BiCMOS dynamic minimum circuit using a parallel comparison algorithm for the VLSI implementation of fuzzy controllers is presented. Using BiCMOS dynamic circuits and a parallel comparison algorithm a four 4-bit-input minimum circuit, designed based on a 2 µm BiCMOS technology, shows a 7.4 ns comparison time, which is a x 3 improvement in speed as compared with the CMOS circuit. In addition, this circuit has an expansion capability for realising largescale minimum circuits. © 1993, The Institution of Electrical Engineers. All rights reserved.
Subjects
Algorithms; Fuzzy logic; Integrated circuits
Other Subjects
Algorithms; Bipolar integrated circuits; Circuit theory; Fuzzy sets; Inference engines; Integrated circuit layout; Minimization of switching nets; BiCMOS dynamic minimum circuit; Parallel comparison algorithm; CMOS integrated circuits
Type
journal article