Procrastination for leakage-aware rate-monotonic scheduling on a dynamic voltage scaling processor.
Journal
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006
Pages
153-162
Date Issued
2006
Author(s)
Chen, Jian-Jia
Abstract
As the dynamic voltage scaling (DVS) technique provides system engineers the flexibility to trade-off the performance and the energy consumption, DVS has been adopted in many computing systems. However, the longer a job executes, the more energy in the leakage current the device/processor consumes for the job. To reduce the energy consumption resulting from the leakage current, a system might enter the dormant mode. This paper targets energy-efficient rate-monotonic scheduling for periodic real-time tasks on a uniprocessor DVS system with non-negligible leakage power consumption. An on-line simulated scheduling strategy and a virtually blocking time strategy are developed for procrastination scheduling to reduce energy consumption. The proposed algorithms derive a feasible schedule for real-time tasks with worst-case guarantees for any input instance. Experimental results show that our proposed algorithms could derive energy-efficient solutions. Copyright © 2006 ACM.
Subjects
Dynamic voltage scaling; Energy-aware systems; Fixed-priority scheduling; Leakage-aware scheduling; Rate-monotonic scheduling; Scheduling
SDGs
Other Subjects
Algorithms; Computer simulation; Energy utilization; Leakage currents; Real time systems; Scheduling; Systems engineering; Dynamic voltage scaling; Energy-aware systems; Fixed-priority scheduling; Leakage-aware scheduling; Rate-monotonic scheduling; Program processors
Type
conference paper