A 60-GHz CMOS Power Amplifier with Built-in Pre-distortion Linearizer
Journal
IEEE Microwave and Wireless Components Letters
Journal Volume
21
Journal Issue
12
Pages
676-678
Date Issued
2011-12
Author(s)
Abstract
A built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power amplifier (PA) achieves a P sat of 10.72 dBm and OP 1 dB of 7.3 dBm from 1.2 V supply. After linearization, the OP 1 dB has been doubled from 7.3 to 10.2 dBm and the operating PAE at OP 1 dB consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB.
SDGs
Type
journal article