Design of Silicon-Based Low Noise Amplifiers for K-Band and Ultra-wideband Applications
Date Issued
2005
Date
2005
Author(s)
Shin, Shih-Chieh
DOI
en-US
Abstract
With the development of wireless communication technologies, RF integrated circuits move toward higher frequencies, wider bandwidth, and higher integration level with baseband circuits. In wireless communication receiver front-ends, low noise amplifier (LNA) is used to amplify the weak signal from the antenna with minimum noise contribution. Silicon-based technologies, including CMOS and SiGe BiCMOS, can integrate the baseband digital, IF analog, and RF front-end circuits on the same die, thereby reducing the production cost. However, compared to GaAs processes, the inherent semiconductor properties of the silicon substrate result in high parasitic capacitance, higher loss with increasing operating frequency and difficult prediction of passive elements at high frequency. Despite these difficulties, Si-based RFIC is still an active research topic in recent years for low-cost and high-integration wireless communication systems.
In this thesis, two CMOS LNAs operating at K-band were developed. The first LNA is implemented in a standard 0.18-μm CMOS technology. The major challenge of this circuit is that the operating frequency is almost half of fMAX. Proper design of matching networks leads to good noise and gain performances. The measured NF is 3.9 dB and the small signal gain is 13.1 dB at 24 GHz. The dc power consumption is 14 mW. The chip size is only 0.34 mm2. Another circuit is fabricated in an advanced 90-nm bulk CMOS process. However, the new technology also has higher process variation and modeling uncertainty. In order to overcome these problems, coplanar waveguide (CPW) transmission lines are used as matching elements to reduce the effect of lossy substrate. The circuit is also designed to have a wide-band frequency response to tolerate process variation. The measured small signal gain is 16.2 dB at the peak gain frequency of 20.5 GHz with a 3-dB frequency band from 18 to 26 GHz. The minimum NF is 2.5 dB. Both LNAs reveal lower noise figure compared with published works of CMOS LNAs operating at frequencies around 20 GHz.
Another LNA is designed for ultra-wideband (UWB) applications. The circuit is fabricated in a 0.35-μm SiGe BiCMOS technology. The hetero-junction bipolar transistor (HBT) provided in this process has a good transconductance to current ratio (gm/IC). Based on the architecture of the distributed amplifier, wide band performance with good return losses can be obtained. An additional inductor in parallel with the termination resistor is used to transfer the frequency response from a low-pass to a band-pass response and to provide another dc path for the collector current to bypass the termination resistor. Therefore a lower supply voltage can be used. The termination resistor is replaced by a variable resistance FET. Different resistances are selected for different bias conditions to reduce the load mismatch effect and lead to good flatness of gain response. The measured small signal gain is 12 dB with a 3-dB frequency band from 1.6 to 12.1 GHz under the power consumption of only 6.4 mW. The noise figure is lower than 6.5 dB. The gain control range is about 38 dB with maximum gain of 20 dB and maximum attenuation of 18 dB. At these gain levels, the maximum gain variation from 3.1 to 10.6 GHz is about 1 dB.
In this thesis, two CMOS LNAs operating at K-band were developed. The first LNA is implemented in a standard 0.18-μm CMOS technology. The major challenge of this circuit is that the operating frequency is almost half of fMAX. Proper design of matching networks leads to good noise and gain performances. The measured NF is 3.9 dB and the small signal gain is 13.1 dB at 24 GHz. The dc power consumption is 14 mW. The chip size is only 0.34 mm2. Another circuit is fabricated in an advanced 90-nm bulk CMOS process. However, the new technology also has higher process variation and modeling uncertainty. In order to overcome these problems, coplanar waveguide (CPW) transmission lines are used as matching elements to reduce the effect of lossy substrate. The circuit is also designed to have a wide-band frequency response to tolerate process variation. The measured small signal gain is 16.2 dB at the peak gain frequency of 20.5 GHz with a 3-dB frequency band from 18 to 26 GHz. The minimum NF is 2.5 dB. Both LNAs reveal lower noise figure compared with published works of CMOS LNAs operating at frequencies around 20 GHz.
Another LNA is designed for ultra-wideband (UWB) applications. The circuit is fabricated in a 0.35-μm SiGe BiCMOS technology. The hetero-junction bipolar transistor (HBT) provided in this process has a good transconductance to current ratio (gm/IC). Based on the architecture of the distributed amplifier, wide band performance with good return losses can be obtained. An additional inductor in parallel with the termination resistor is used to transfer the frequency response from a low-pass to a band-pass response and to provide another dc path for the collector current to bypass the termination resistor. Therefore a lower supply voltage can be used. The termination resistor is replaced by a variable resistance FET. Different resistances are selected for different bias conditions to reduce the load mismatch effect and lead to good flatness of gain response. The measured small signal gain is 12 dB with a 3-dB frequency band from 1.6 to 12.1 GHz under the power consumption of only 6.4 mW. The noise figure is lower than 6.5 dB. The gain control range is about 38 dB with maximum gain of 20 dB and maximum attenuation of 18 dB. At these gain levels, the maximum gain variation from 3.1 to 10.6 GHz is about 1 dB.
Subjects
矽基
K頻段
超寬頻
低雜訊放大器
Silicon-Based
Low Noise Amplifier
K-Band
Ultra-wideband
Type
thesis
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